JIT Compiler Security through Low-Cost RISC-V Extension

التفاصيل البيبلوغرافية
العنوان: JIT Compiler Security through Low-Cost RISC-V Extension
المؤلفون: Ducasse, Quentin, Cotret, Pascal, Lagadec, Loïc
المساهمون: Equipe Hardware ARchitectures and CAD tools (Lab-STICC_ARCAD), Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom Paris (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom Paris (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom Paris (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom Paris (IMT), École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)
المصدر: 30th Reconfigurable Architectures Workshop
https://hal.science/hal-04031296Test
30th Reconfigurable Architectures Workshop, May 2023, St Petersburg (Florida), United States
https://raw.necst.itTest/
بيانات النشر: HAL CCSD
سنة النشر: 2023
المجموعة: Université de Bretagne Occidentale: HAL
مصطلحات موضوعية: [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR]
جغرافية الموضوع: St Petersburg (Florida), United States
الوصف: International audience ; Language Virtual Machines (VM) need to be extremely efficient and hence use complex engines such as a JIT compiler to speed up the usual bytecode interpretation loop. Their usage of low-level and security-critical tasks make them targets of choice. Enforcing low-cost fine-grained memory isolation has been an important research focus as a countermeasure to the most advanced JIT attacks. Memory isolation splits the components of an application with controlled communication and verified access to other resources. We present how custom instructions linked to hardware-enforced domain-checking could protect JIT code and data. We present incremental solutions and their corresponding custom instructions. The generated machine code and extended RISC-V Rocket come at a low-cost both in performance and intrusiveness.
نوع الوثيقة: conference object
اللغة: English
العلاقة: hal-04031296; https://hal.science/hal-04031296Test; https://hal.science/hal-04031296/documentTest; https://hal.science/hal-04031296/file/main.pdfTest
الإتاحة: https://hal.science/hal-04031296Test
https://hal.science/hal-04031296/documentTest
https://hal.science/hal-04031296/file/main.pdfTest
حقوق: info:eu-repo/semantics/OpenAccess
رقم الانضمام: edsbas.A64742E
قاعدة البيانات: BASE