التفاصيل البيبلوغرافية
| العنوان: |
Reconfigurable content-based router using hardware-accelerated language parser |
| المؤلفون: |
Moscola, James, Lockwood, John W., Cho, Young H. |
| المساهمون: |
U.S. Air Force |
| المصدر: |
ACM Transactions on Design Automation of Electronic Systems ; volume 13, issue 2, page 1-25 ; ISSN 1084-4309 1557-7309 |
| بيانات النشر: |
Association for Computing Machinery (ACM) |
| سنة النشر: |
2008 |
| الوصف: |
This article presents a dense logic design for matching multiple regular expressions with a field programmable gate array (FPGA) at 10+ Gbps. It leverages on the design techniques that enforce the shortest critical path on most FPGA architectures while optimizing the circuit size. The architecture is capable of supporting a maximum throughput of 12.90 Gbps on a Xilinx Virtex 4 LX200 and its performance is linearly scalable with size. Additionally, this article presents techniques for parsing data streams to provide semantic information for patterns found within a data stream. We illustrate how a content-based router can be implemented with our parsing techniques using an XML parser as an example. The content-based router presented was designed, implemented, and tested in a Xilinx Virtex XCV2000E FPGA on the FPX platform. It is capable of processing 32-bits of data per clock cycle and runs at 100 MHz. This allows the system to process and route XML messages at 3.2 Gbps. |
| نوع الوثيقة: |
article in journal/newspaper |
| اللغة: |
English |
| DOI: |
10.1145/1344418.1344424 |
| الإتاحة: |
https://doi.org/10.1145/1344418.1344424Test |
| رقم الانضمام: |
edsbas.87C39300 |
| قاعدة البيانات: |
BASE |
