دورية أكاديمية
Speeding Up LAT: Generating a Linear Approximation Table Using a Bitsliced Implementation
العنوان: | Speeding Up LAT: Generating a Linear Approximation Table Using a Bitsliced Implementation |
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المؤلفون: | Kim, Giyoon, Jeon, Yongjin, Kim, Jongsung |
المساهمون: | Institute for Information & communications Technology Promotion (IITP) grant funded by the Korea government, Development of SCR-Friendly Symmetric Key Cryptosystem and Its Application Modes |
المصدر: | IEEE Access ; volume 10, page 4919-4923 ; ISSN 2169-3536 |
بيانات النشر: | Institute of Electrical and Electronics Engineers (IEEE) |
سنة النشر: | 2022 |
مصطلحات موضوعية: | General Engineering, General Materials Science, General Computer Science, Electrical and Electronic Engineering |
نوع الوثيقة: | article in journal/newspaper |
اللغة: | unknown |
DOI: | 10.1109/access.2022.3140242 |
الإتاحة: | https://doi.org/10.1109/access.2022.3140242Test http://xplorestaging.ieee.org/ielx7/6287639/9668973/09668952.pdf?arnumber=9668952Test |
حقوق: | https://creativecommons.org/licenses/by/4.0/legalcodeTest |
رقم الانضمام: | edsbas.81249F0C |
قاعدة البيانات: | BASE |
DOI: | 10.1109/access.2022.3140242 |
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