دورية أكاديمية

A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC

التفاصيل البيبلوغرافية
العنوان: A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC
المؤلفون: Han, Haolin, Liu, Shubin, Liang, Hongzhi, Shen, Yi, Guo, Jianyu, Ren, Ruili, Zhu, Zhangming
المساهمون: National Key Research and Development Project of China, National Natural Science Foundation of China
المصدر: IEEE Transactions on Circuits and Systems I: Regular Papers ; volume 71, issue 4, page 1495-1505 ; ISSN 1549-8328 1558-0806
بيانات النشر: Institute of Electrical and Electronics Engineers (IEEE)
سنة النشر: 2024
مصطلحات موضوعية: Electrical and Electronic Engineering, Hardware and Architecture
نوع الوثيقة: article in journal/newspaper
اللغة: unknown
DOI: 10.1109/tcsi.2024.3354995
الإتاحة: https://doi.org/10.1109/tcsi.2024.3354995Test
http://xplorestaging.ieee.org/ielx7/8919/10484988/10415372.pdf?arnumber=10415372Test
حقوق: https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.htmlTest ; https://doi.org/10.15223/policy-029Test ; https://doi.org/10.15223/policy-037Test
رقم الانضمام: edsbas.573EDDA6
قاعدة البيانات: BASE