دورية
TSV Stress-Aware Full-Chip Mechanical Reliability Analysis and Optimization for 3D IC.
| العنوان: | TSV Stress-Aware Full-Chip Mechanical Reliability Analysis and Optimization for 3D IC. |
|---|---|
| المؤلفون: | Moongon Jung, Mitra, Joydeep, Pan, David Z., Sung Kyu Lim |
| المصدر: | Communications of the ACM; Jan2014, Vol. 57 Issue 1, p107-115, 9p, 2 Black and White Photographs, 5 Diagrams, 6 Charts, 5 Graphs |
| مصطلحات موضوعية: | STRAINS & stresses (Mechanics), RELIABILITY in engineering, INTEGRATED circuits, SILICON, DIELECTRICS, FINITE element method |
| مستخلص: | The article discusses a full-chip thermomechanical stress and reliability analysis tool, as well as a design optimization methodology, to resolve mechanical reliability problems in three-dimensional (3D) integrated circuits (ICs). It provides an analysis of the thermomechanical stress resulting from the through-silicon-via (TSV) in conjunction with associated structures such as landing pad and dielectric liner. The article also explores and validates the linear superposition principle of stress tensors and demonstrates the accuracy of the method against detailed finite element analysis (FEA) simulations. |
| قاعدة البيانات: | Complementary Index |
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https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&scope=site&db=edb&AN=93471657&custid=s6537998&authtype=sso |
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