المؤلفون: SZÁSZ Csaba

المصدر: Journal of Electrical and Electronics Engineering, Vol 17, Iss 1, Pp 35-40 (2024)

مصطلحات موضوعية: servo control system, reconfigurable hardware technology, fpga processor, servomotor, vivado design suite, Electrical engineering. Electronics. Nuclear engineering, TK1-9971

وصف الملف: electronic resource

العلاقة: https://electroinf.uoradea.ro/images/articles/CERCETARE/Reviste/JEEE/JEEE_V17_N1_MAY_2024/07%20paper%202401161%20SZASZ.pdfTest; https://doaj.org/toc/1844-6035Test; https://doaj.org/toc/2067-2128Test

الوصول الحر: https://doaj.org/article/8e8498dfe2744cdba89c4314514617b0Test

المؤلفون: Vaddiraju Venkata Satya Sreya, Lanka Mohan Satish, Velaga Hemu Sai, Sasanapuri Sai Vijaya Krishna

المصدر: World Journal of Advanced Research and Reviews 16(1) 761–766

مصطلحات موضوعية: Convolutional Neural Network (CNN), Filter, field-programmable gate array (FPGA), Winograd, Vivado, Matlab

العلاقة: https://zenodo.org/communities/wjarrTest; https://zenodo.org/record/7771733Test; https://doi.org/10.5281/zenodo.7771733Test; oai:zenodo.org:7771733

الإتاحة: https://doi.org/10.5281/zenodo.7771733Test
https://doi.org/10.30574/wjarr.2022.16.1.1101Test
https://doi.org/10.5281/zenodo.7771732Test
https://zenodo.org/record/7771733Test

المؤلفون: Nivedh Mohanan, Subhash P C, Subin K S, Subin V Ninan, Elisabeth Thomas, S N Kumar

مصطلحات موضوعية: RISC, Vivado 18.3, ALU, MAC, Vedic Mathematics

العلاقة: https://zenodo.org/record/8004923Test; https://doi.org/10.5281/zenodo.8004923Test; oai:zenodo.org:8004923

الإتاحة: https://doi.org/10.5281/zenodo.8004923Test
https://doi.org/10.5281/zenodo.8004922Test
https://zenodo.org/record/8004923Test

المؤلفون: Dr. Chandrashekhar Patel, Prof. Abhay Saxena, Prof. (Dr.) Anita Rawat, Prof. Omprakash Nautiyal

المساهمون: Dr. Chandrashekhar Patel

المصدر: International Journal of Recent Technology and Engineering (IJRTE) 11(6) 102-110

مصطلحات موضوعية: SP701, FPGA, VIVADO, RISC, LVCMOS, Verilog, ISSN: 2277-3878 (Online), Retrieval Number: 100.1/ijrte.F74980311623, Journal Website, Publisher: Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP)

العلاقة: https://zenodo.org/record/7977097Test; https://doi.org/10.35940/ijrte.F7498.0311623Test; oai:zenodo.org:7977097

الإتاحة: https://doi.org/10.35940/ijrte.F7498.0311623Test
https://zenodo.org/record/7977097Test

المؤلفون: Kashikar, Prachi, Sentieys, Olivier, Sinha, Sharad

المساهمون: INDIAN INSTITUTE OF TECHNOLOGY GOA (IIT GOA), Architectures matérielles spécialisées pour l’ère post loi-de-Moore (TARAN), Inria Rennes – Bretagne Atlantique, Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-ARCHITECTURE (IRISA-D3), Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-Institut National de Recherche en Informatique et en Automatique (Inria)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom Paris (IMT)-Institut Mines-Télécom Paris (IMT)-Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut Mines-Télécom Paris (IMT)-Institut Mines-Télécom Paris (IMT)-Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom Paris (IMT)-Institut Mines-Télécom Paris (IMT), Inria Associated Team IntelliVIS, ANR-18-CE23-0012,AdequateDL,Accélérateurs Approximatifs pour Apprentissage Profond(2018)

المصدر: ISSN: 1063-8210 ; IEEE Transactions on Very Large Scale Integration (VLSI) Systems ; https://hal.science/hal-04397024Test ; IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023, 31, pp.1816 - 1825. ⟨10.1109/tvlsi.2023.3307607⟩.

مصطلحات موضوعية: Convolutional neural network (CNN), FPGA, generalized matrix multiplication (GEMM), model compression, Vivado HLS, [INFO]Computer Science [cs]

العلاقة: hal-04397024; https://hal.science/hal-04397024Test; https://hal.science/hal-04397024/documentTest; https://hal.science/hal-04397024/file/Lossless_Neural_Network_Model_Compression_Through_Exponent_Sharing.pdfTest

الإتاحة: https://doi.org/10.1109/tvlsi.2023.3307607Test
https://hal.science/hal-04397024Test
https://hal.science/hal-04397024/documentTest
https://hal.science/hal-04397024/file/Lossless_Neural_Network_Model_Compression_Through_Exponent_Sharing.pdfTest

المؤلفون: Bharathi M, Krithikaa Mohanarangam, Yasha Jyothi M Shirur, Jun Rim Choi

المصدر: Electronics, Vol 12, Iss 4236, p 4236 (2023)

مصطلحات موضوعية: 16-bit processor, distributed arithmetic (DA), Block RAM (BRAM), Xilinx Vivado, Genesys2 Kintex, Electronics, TK7800-8360

العلاقة: https://www.mdpi.com/2079-9292/12/20/4236Test; https://doaj.org/toc/2079-9292Test; https://doaj.org/article/e2d9c02fcff24a3c9af21f834a5f5e7fTest

الإتاحة: https://doi.org/10.3390/electronics12204236Test
https://doaj.org/article/e2d9c02fcff24a3c9af21f834a5f5e7fTest

المؤلفون: Pascan, Victor

المساهمون: Gomes, Luís, RUN

مصطلحات موضوعية: Field-Programmable Gate Array, Detecção de Faixa de Rodagem Automóvel, Transformada de Hough, Vivado HLS, Domínio/Área Científica::Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática

وصف الملف: application/pdf

الإتاحة: http://hdl.handle.net/10362/121254Test

المؤلفون: Sandeep S., Kiran V.

مصطلحات موضوعية: KSA CSKA CLA RCA HDL Xilinx Vivado Cadence Genus

العلاقة: https://zenodo.org/record/7315383Test; https://doi.org/10.5281/zenodo.7315383Test; oai:zenodo.org:7315383

الإتاحة: https://doi.org/10.5281/zenodo.7315383Test
https://doi.org/10.5281/zenodo.7315382Test
https://zenodo.org/record/7315383Test

المؤلفون: Ahmed Abdulkadhim Hamad, Haider Al-Mumen, Mohammed Taih Gatte

المصدر: Bulletin of Electrical Engineering and Informatics 11(3) 1460~1470

مصطلحات موضوعية: Cyclic redundancy check code, Experimental board, Field programmable gate array, Hamming code, Vivado high-level synthesis

العلاقة: https://zenodo.org/record/6781471Test; https://doi.org/10.11591/eei.v11i3.3778Test; oai:zenodo.org:6781471

الإتاحة: https://doi.org/10.11591/eei.v11i3.3778Test
https://zenodo.org/record/6781471Test

المؤلفون: Krishna, T Rama, Murthy, T Krishna, Sarode, N Vilasrao, Srilakshmi, P, Sri, V Geetha

المصدر: International Journal of Innovative Research in Computer Science & Technology; Vol. 10 No. 2 (2022): International Journal of Innovative Research in Computer Science and Technology (Mar ) 2022; 611- 614 ; 2347-5552

مصطلحات موضوعية: Encoding, Decoding Techniques, MAP, Xilinx, vivado

وصف الملف: application/pdf

العلاقة: https://acspublisher.com/journals/index.php/ijircst/article/view/10650/9608Test; https://acspublisher.com/journals/index.php/ijircst/article/view/10650Test

الإتاحة: https://acspublisher.com/journals/index.php/ijircst/article/view/10650Test