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1دورية أكاديمية
المؤلفون: Ahmed Abdullah, Francesco Musolino, Paolo S. Crovetti
المصدر: IEEE Access, Vol 11, Pp 9403-9414 (2023)
مصطلحات موضوعية: Digital pulse width modulator (DPWM), dyadic digital pulse width modulation (DDPWM), digitally controlled boost converter, HDL verilog, limit-cycles oscillations (LCOs), simulink/modelsim co-simulation, Electrical engineering. Electronics. Nuclear engineering, TK1-9971
وصف الملف: electronic resource
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2دورية أكاديمية
المؤلفون: Zaim Zakwan Aminuddin, Irni Hamiza Hamzah, Ahmad Asri Abd Samat, Mohaiyedin Idris, Alhan Farhanah Abd Rahim, Zainal Hisham Che Soh
المصدر: International Journal of Reconfigurable and Embedded Systems (IJRES) 11(3) 205-214
مصطلحات موضوعية: Field programmable gate arrays, Finite state machine, ModelSim, Quartus II, Verilog
العلاقة: https://zenodo.org/record/7269737Test; https://doi.org/10.11591/ijres.v11.i3.pp205-214Test; oai:zenodo.org:7269737
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3دورية أكاديمية
المؤلفون: Morasa, Balaji, Nimmagadda, Padmaja
المصدر: Indonesian Journal of Electrical Engineering and Computer Science 26(1) 127-134
مصطلحات موضوعية: Electroencephalograph, Finite impulse response, FPGA, MODELSIM, Residue number system
العلاقة: https://zenodo.org/record/7141301Test; https://doi.org/10.11591/ijeecs.v26.i1.pp127-134Test; oai:zenodo.org:7141301
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4دورية أكاديمية
المؤلفون: Likitha, C., Murali, G. K., Mandira, A. U., Tejaswini, M. S., Hema, C.
المصدر: International Journal of Research in Engineering, Science and Management; Vol. 5 No. 6 (2022); 89-91 ; 2581-5792
مصطلحات موضوعية: FPGA tool, ALP, Golomb rice coding, Xilinx, Modelsim
وصف الملف: application/pdf
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5دورية أكاديمية
المؤلفون: Manikandan, G.1, Anand, M.2
المصدر: Indian Journal of Public Health Research & Development 9(10):1112-1116. 2018
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6
المؤلفون: FRANCESCO MUSOLINO, Paolo Crovetti, Ahmed Abdullah
المصدر: IEEE Access. 11:9403-9414
مصطلحات موضوعية: Switch-mode power converters, Digitally controlled boost converter, General Computer Science, Digital Pulse Width Modulator (DPWM), Dyadic Digital Pulse Width Modulation (DDPWM), HDL Verilog, Limit-cycle oscillations (LCOs), Simulink/Modelsim co-simulation, General Engineering, General Materials Science, Electrical and Electronic Engineering
الوصول الحر: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6e4b921c1f7b826e5cc02af8fcf6fa5aTest
https://doi.org/10.1109/access.2023.3239883Test -
7دورية أكاديمية
المؤلفون: Quynh, Nguyen Vu
المصدر: Vietnam Journal of Science and Technology; Vol 59, No 2 (2021); 234 ; Tạp chí Khoa học và Công nghệ; Vol 59, No 2 (2021); 234 ; 2525-2518
وصف الملف: application/pdf
العلاقة: http://vjs.ac.vn/index.php/jst/article/view/14921/103810384537Test; http://vjs.ac.vn/index.php/jst/article/view/14921Test
الإتاحة: https://doi.org/10.15625/2525-2518/59/2/14921Test
http://vjs.ac.vn/index.php/jst/article/view/14921Test -
8دورية أكاديمية
المؤلفون: HuiXing Li, YangKai Feng, ShanQing Hu, BingYi Li, YiZhuang Xie, MengChao Wu
المصدر: The Journal of Engineering (2019)
مصطلحات موضوعية: microprocessor chips, filtering theory, field programmable gate arrays, floating point arithmetic, radar imaging, synthetic aperture radar, iterative methods, matrix inversion, image sampling, pipeline processing, processor scheduling, resource allocation, reconfigurable architectures, fpga-based reconfigurable matrix inversion implementation, multichannel sar imaging, multichannel synthetic aperture radar, virtual points, inverse filter algorithm, matrix inversion method, lu decomposition algorithm, hierarchical iterative processing strategy, reconfigurable storage, computing unit, azimuthal nonuniform sampling results, multichannel preprocessing, floating-point ip cores, single-precision floating-point data type, resource balancing, reusable structure, pipeline technology, data scheduling, modelsim platform, Engineering (General). Civil engineering (General), TA1-2040
وصف الملف: electronic resource
العلاقة: https://digital-library.theiet.org/content/journals/10.1049/joe.2019.0748Test; https://doaj.org/toc/2051-3305Test
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9دورية أكاديمية
المؤلفون: Jiale Wang, Yizhuang Xie, Chen Yang
المصدر: The Journal of Engineering (2019)
مصطلحات موضوعية: radar imaging, field programmable gate arrays, synthetic aperture radar, digital signal processing chips, fast fourier transforms, pipeline processing, digital signal processing theory, field-programmable gate array platforms, single channel pipelined variable-length fft processor design, synthetic aperture radar imaging, xilinx fpga platform, single channel pipelined variable-length fast fourier transform processor design, real-time fft processor design method, high-throughput fft processor design method, ise synthesis, xc6vlx760ff1760-1 chip, modelsim simulation, Engineering (General). Civil engineering (General), TA1-2040
وصف الملف: electronic resource
العلاقة: https://digital-library.theiet.org/content/journals/10.1049/joe.2019.0713Test; https://doaj.org/toc/2051-3305Test
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10دورية أكاديمية
المؤلفون: Ying-Shieh Kung, Seng-Chi Chen, Jin-Mu Lin, Tsung-Chun Tseng
المساهمون: Dr Teen-Hang Meen
المصدر: Engineering Computations, 2016, Vol. 33, Issue 6, pp. 1835-1852.