Vertical architecture for enhancement mode power transistors based on GaN nanowires

التفاصيل البيبلوغرافية
العنوان: Vertical architecture for enhancement mode power transistors based on GaN nanowires
المؤلفون: Feng Yu, Alaaeldin Gad, Bernd Witzigmann, Martin Strassburg, Jana Hartmann, Andreas Waag, Hergo-Heinrich Wehmann, Tilman Schimpke, D. Rümmler, Andrey Bakin, Lorenzo Caccamo, Hutomo Suryo Wasisto
المصدر: Applied Physics Letters. 108:213503
بيانات النشر: AIP Publishing, 2016.
سنة النشر: 2016
مصطلحات موضوعية: 010302 applied physics, Materials science, Physics and Astronomy (miscellaneous), business.industry, Transconductance, Transistor, Nanowire, 02 engineering and technology, 021001 nanoscience & nanotechnology, 01 natural sciences, Subthreshold slope, Threshold voltage, law.invention, Nanoelectronics, law, 0103 physical sciences, Breakdown voltage, Optoelectronics, Power semiconductor device, 0210 nano-technology, business
الوصف: The demonstration of vertical GaN wrap-around gated field-effect transistors using GaN nanowires is reported. The nanowires with smooth a-plane sidewalls have hexagonal geometry made by top-down etching. A 7-nanowire transistor exhibits enhancement mode operation with threshold voltage of 1.2 V, on/off current ratio as high as 108, and subthreshold slope as small as 68 mV/dec. Although there is space charge limited current behavior at small source-drain voltages (Vds), the drain current (Id) and transconductance (gm) reach up to 314 mA/mm and 125 mS/mm, respectively, when normalized with hexagonal nanowire circumference. The measured breakdown voltage is around 140 V. This vertical approach provides a way to next-generation GaN-based power devices.
تدمد: 1077-3118
0003-6951
الوصول الحر: https://explore.openaire.eu/search/publication?articleId=doi_________::c8cdb4d9816d92d1044fbc488f88585aTest
https://doi.org/10.1063/1.4952715Test
رقم الانضمام: edsair.doi...........c8cdb4d9816d92d1044fbc488f88585a
قاعدة البيانات: OpenAIRE