التفاصيل البيبلوغرافية
| العنوان: |
Submission of the first full scale prototype chip for upgraded ATLAS pixel detector at LHC, FE-I4A |
| المؤلفون: |
Barbero, Marlon1 barbero@physik.uni-bonn.de, Arutinov, David1, Beccherle, Roberto2, Darbo, Giovanni2, Dube, Sourabh3, Elledge, David3, Fleury, Julien3, Fougeron, Denis4, Garcia-Sciveres, Maurice3, Gensolen, Fabrice4, Gnani, Dario3, Gromov, Vladimir5, Jensen, Frank3, Hemperek, Tomasz1, Karagounis, Michael1, Kluit, Ruud5, Kruth, Andre1, Mekkaoui, Abderrezak3, Menouni, Mohsine4, Schipper, Jan David5 |
| المصدر: |
Nuclear Instruments & Methods in Physics Research Section A. Sep2011, Vol. 650 Issue 1, p111-114. 4p. |
| مصطلحات موضوعية: |
*PIXELS, *LARGE Hadron Collider, *COMPLEMENTARY metal oxide semiconductors, *NUCLEAR counters, *RADIATION tolerance, *PROTOTYPES |
| مصطلحات جغرافية: |
FRANCE, SWITZERLAND |
| مستخلص: |
Abstract: A new ATLAS pixel chip FE-I4 is being developed for use in upgraded LHC luminosity environments, including the near-term Insertable B-Layer (IBL) upgrade. FE-I4 is designed in a 130nm CMOS technology, presenting advantages in terms of radiation tolerance and digital logic density compared to the CMOS technology used for the current ATLAS pixel IC, FE-I3. The FE-I4 architecture is based on an array of 80×336 pixels, each , consisting of analog and digital sections. In the summer 2010, a first full scale prototype FE-I4A was submitted for an engineering run. This IC features the full scale pixel array as well as the complex periphery of the future full-size FE-I4. The FE-I4A contains also various extra test features which should prove very useful for the chip characterization, but deviate from the needs for standard operation of the final FE-I4 for IBL. In this paper, focus will be brought to the various features implemented in the FE-I4A submission, while also underlining the main differences between the FE-I4A IC and the final FE-I4 as envisioned for IBL. [Copyright &y& Elsevier] |
| قاعدة البيانات: |
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