المؤلفون: Zhang, Meng, Jiang, Zhendong, Lu, Lei, Wong, Man, Kwok, Hoi Sing

مصطلحات موضوعية: Degradation, Emission time, Junctions, Logic gates, Nonequilibrium junction degradation model, Polycrystalline silicon, Recapture time, Reliability, Stress, Thin film transistors, Thin-film transistors, Voltage

الوصف: Degradation behaviors of polycrystalline silicon thin-film transistors under dynamic gate voltage stress with short pulse width duration are systematically investigated for the first time. Both the peak voltage duration and the base voltage duration have an impact on the hot carrier degradation of the device. Incorporated with simulations, an advanced model for nonequilibrium junction degradation is proposed. IEEE

العلاقة: https://repository.hkust.edu.hk/ir/Record/1783.1-135082Test; IEEE Electron Device Letters, v. 45, (2), February 2024, article number 10366251, p. 204-207; https://doi.org/10.1109/LED.2023.3345282Test; http://lbdiscover.ust.hk/uresolver?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rfr_id=info:sid/HKUST:SPI&rft.genre=article&rft.issn=0741-3106&rft.volume=&rft.issue=&rft.date=2023&rft.spage=1&rft.aulast=Zhang&rft.aufirst=Meng&rft.atitle=Analysis+of+Degradation+Mechanism+in+Poly-Si+TFTs+under+Dynamic+Gate+Voltage+Stress+with+Short+Pulse+Width+Duration&rft.title=IEEE+Electron+Device+LettersTest; http://www.scopus.com/record/display.url?eid=2-s2.0-85182363827&origin=inwardTest

الإتاحة: https://doi.org/10.1109/LED.2023.3345282Test
https://repository.hkust.edu.hk/ir/Record/1783.1-135082Test
http://lbdiscover.ust.hk/uresolver?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rfr_id=info:sid/HKUST:SPI&rft.genre=article&rft.issn=0741-3106&rft.volume=&rft.issue=&rft.date=2023&rft.spage=1&rft.aulast=Zhang&rft.aufirst=Meng&rft.atitle=Analysis+of+Degradation+Mechanism+in+Poly-Si+TFTs+under+Dynamic+Gate+Voltage+Stress+with+Short+Pulse+Width+Duration&rft.title=IEEE+Electron+Device+LettersTest
http://www.scopus.com/record/display.url?eid=2-s2.0-85182363827&origin=inwardTest

المؤلفون: Zhang, Meng, Wang, Yunyang, Jiang, Zhendong, Xu, Xindi, Huang, Jinyang, Wong, Man, Kwok, Hoi-Sing

مصطلحات موضوعية: Fast transition time, Gate pulse stress, Hot carrier (HC), Nonequilibrium drain junction, Polycrystalline silicon (poly-Si), Thin-film transistors (TFTs)

الوصف: Dynamic hot carrier (HC) degradation behavior of polycrystalline silicon (poly-Si) thin-film transistors (TFTs) under gate voltage pulse stress with fast transition time is systematically investigated for the first time. The dynamic HC degradation is dependent on pulse rising time but independent of pulse falling time. Extremely severe HC degeneration is observed under gate voltage pulse stress with a fast transition time smaller than 20 ns. Combined with TCAD simulations, the dynamic HC degradation mechanism is discussed. The test results would be helpful for the reliability designing of the poly-Si TFTs in high-frequency applications. © 2023 IEEE.

العلاقة: https://repository.hkust.edu.hk/ir/Record/1783.1-132761Test; Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA, v. 2023-July, July 2023, article number 10249065; https://doi.org/10.1109/IPFA58228.2023.10249065Test; http://lbdiscover.ust.hk/uresolver?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rfr_id=info:sid/HKUST:SPI&rft.genre=article&rft.issn=&rft.volume=&rft.issue=&rft.date=2023&rft.spage=&rft.aulast=Zhang&rft.aufirst=Meng&rft.atitle=Dynamic+Hot+Carrier+Degradation+Behavior+ofTest+Polycrystalline+Silicon+Thin-Film+Transistors+under+Gate+Voltage+Pulse+Stress+with+Fast+Transition+Time&rft.title=Proceedings+of+the+International+Symposium+on+the+Physical+and+Failure+Analysis+of+Integrated+Circuits,+IPFA; http://www.scopus.com/record/display.url?eid=2-s2.0-85173559493&origin=inwardTest

الإتاحة: https://doi.org/10.1109/IPFA58228.2023.10249065Test
https://repository.hkust.edu.hk/ir/Record/1783.1-132761Test
http://lbdiscover.ust.hk/uresolver?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rfr_id=info:sid/HKUST:SPI&rft.genre=article&rft.issn=&rft.volume=&rft.issue=&rft.date=2023&rft.spage=&rft.aulast=Zhang&rft.aufirst=Meng&rft.atitle=Dynamic+Hot+Carrier+Degradation+Behavior+ofTest+Polycrystalline+Silicon+Thin-Film+Transistors+under+Gate+Voltage+Pulse+Stress+with+Fast+Transition+Time&rft.title=Proceedings+of+the+International+Symposium+on+the+Physical+and+Failure+Analysis+of+Integrated+Circuits,+IPFA
http://www.scopus.com/record/display.url?eid=2-s2.0-85173559493&origin=inwardTest

المؤلفون: Kris Baert, C. Vanhoof, P. Fiorini, Sherif Sedky, Matty Caymax, Stefano Loreti

المساهمون: Loreti, S.

مصطلحات موضوعية: Diffraction, Materials science, Tensile stre, chemistry.chemical_element, Germanium, engineering.material, Silicon germanium, Composite material, Spectroscopy, Tensile stress, Deposition (law), Germanium silicon alloy, Mechanical factors, Mechanical factor, X-ray scattering, X-ray diffraction, Semiconductor films, Transmission electron microscopy, Micromachining, Germanium silicon alloys, Semiconductor film, Surface micromachining, Crystallography, Polycrystalline silicon, chemistry, X-ray crystallography, engineering

الوصف: In this work, poly SiGe is proposed as a suitable material for surface micromachining applications that require a low thermal budget. The effect of the deposition conditions and layer thickness on the structural and mechanical properties of poly SiGe is analyzed by means of transmission electron microscopy (TEM) and X-ray diffraction spectroscopy (XRD). It is demonstrated that using as-grown poly SiGe (deposited at 625°C), a low tensile stress (+60 MPa) and a negligible stress gradient can be achieved. © 1999 Kuwait University.

الوصول الحر: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::32c5acb431fa4a192340da1eee2b467eTest
http://www.scopus.com/inward/record.url?eid=2-s2.0-84949784029&partnerID=40&md5=fff0e3a8d2da25f42909f4e784d33abeTest

مستخلص: Dynamic hot carrier (HC) degradation behavior of polycrystalline silicon (poly-Si) thin-film transistors (TFTs) under gate voltage pulse stress with fast transition time is systematically investigated for the first time. The dynamic HC degradation is dependent on pulse rising time but independent of pulse falling time. Extremely severe HC degeneration is observed under gate voltage pulse stress with a fast transition time smaller than 20 ns. Combined with TCAD simulations, the dynamic HC degradation mechanism is discussed. The test results would be helpful for the reliability designing of the poly-Si TFTs in high-frequency applications. © 2023 IEEE.

مصطلحات الفهرس: Fast transition time, Gate pulse stress, Hot carrier (HC), Nonequilibrium drain junction, Polycrystalline silicon (poly-Si), Thin-film transistors (TFTs), Conference paper

URL: https://repository.hkust.edu.hk/ir/Record/1783.1-132761Test
https://doi.org/10.1109/IPFA58228.2023.10249065Test
http://lbdiscover.ust.hk/uresolver?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rfr_id=info:sid/HKUST:SPI&rft.genre=article&rft.issn=&rft.volume=&rft.issue=&rft.date=2023&rft.spage=&rft.aulast=Zhang&rft.aufirst=Meng&rft.atitle=Dynamic+Hot+Carrier+Degradation+Behavior+ofTest+Polycrystalline+Silicon+Thin-Film+Transistors+under+Gate+Voltage+Pulse+Stress+with+Fast+Transition+Time&rft.title=Proceedings+of+the+International+Symposium+on+the+Physical+and+Failure+Analysis+of+Integrated+Circuits%2C+IPFA
http://www.scopus.com/record/display.url?eid=2-s2.0-85173559493&origin=inwardTest