مؤتمر
Run-time reconfiguration for automatic hardware/software partitioning
| العنوان: | Run-time reconfiguration for automatic hardware/software partitioning |
|---|---|
| المؤلفون: | Davidson, Tom, Bruneel, Karel, Stroobandt, Dirk |
| المساهمون: | Prasanna, V, Becker, J, Cumplido, R |
| المصدر: | Proceedings 2010 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2010) ; ISBN: 9780769543147 ; ISBN: 9781424495238 |
| بيانات النشر: | IEEE Computer Society |
| سنة النشر: | 2010 |
| المجموعة: | Ghent University Academic Bibliography |
| مصطلحات موضوعية: | Technology and Engineering, hardware/software partitioning, dynamic reconfiguration, AES, FPGA, run-time reconfiguration |
| الوصف: | Parameterisable configurations allow very fast run-time reconfiguration in FPGAs. The main advantage of this new concept is the automated tool flow that converts a hardware design into a more resource-efficient run-time reconfigurable design without a large design effort. In this paper, we show that the automated tool flow for run-time reconfiguration can be used to easily optimize a full hardware implementation for area by converting it automatically to a hardware/software implementation. This tool flow can partition the design in a very short time and, at the same time, result in significant area gains. The usage of run time reconfiguration allows us to extend the hardware/software boundary so more functionality can be moved to software. We will explain the core principles behind the run-time reconfiguration technique using the AES encoder as an example. For the AES encoder the manual hardware/software partitioning is clear. This manual partitioning will serve as a comparison to the automated partitioning that uses parameterisable configurations. Several possible AES encoder implementations are compared. Our automatically partitioned AES design shows a 20.6 % area gain compared to an unoptimized hardware implementation and a 5.3 % gain compared to a manually optimized 3rd party hardware implementation. In addition, we discuss the results of our technique on other applications, where the hardware/software partitioning is less clear. Among these, a TripleDES implementation shows a 29.3 % area gain using our technique. Based on our AES encoder results, we derive some guidelines for optimizing the impact of parameterisable configurations in general designs. |
| نوع الوثيقة: | conference object |
| وصف الملف: | application/pdf |
| اللغة: | English |
| ردمك: | 978-0-7695-4314-7 978-1-4244-9523-8 0-7695-4314-6 1-4244-9523-7 |
| العلاقة: | https://biblio.ugent.be/publication/1105031Test; http://hdl.handle.net/1854/LU-1105031Test; http://doi.org/10.1109/ReConFig.2010.57Test; https://biblio.ugent.be/publication/1105031/file/1148368Test |
| DOI: | 10.1109/ReConFig.2010.57 |
| الإتاحة: | https://doi.org/10.1109/ReConFig.2010.57Test https://biblio.ugent.be/publication/1105031Test http://hdl.handle.net/1854/LU-1105031Test https://biblio.ugent.be/publication/1105031/file/1148368Test |
| حقوق: | No license (in copyright) ; info:eu-repo/semantics/openAccess |
| رقم الانضمام: | edsbas.56B91B56 |
| قاعدة البيانات: | BASE |
| ردمك: | 9780769543147 9781424495238 0769543146 1424495237 |
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| DOI: | 10.1109/ReConFig.2010.57 |