3.2 Zen: A next-generation high-performance ×86 core

التفاصيل البيبلوغرافية
العنوان: 3.2 Zen: A next-generation high-performance ×86 core
المؤلفون: Joshua A. Bell, Teja Singh, Stephen V. Kosonocky, Sundar Rangarajan, Shane Southard, Carson Henrion, Hugh McIntyre, Ravi Jotwani, Edward Chang, Amy Novak, Alex Schaefer, Deepesh John, Michael Co
المصدر: ISSCC
بيانات النشر: IEEE, 2017.
سنة النشر: 2017
مصطلحات موضوعية: Engineering, business.industry, CPU cache, 020208 electrical & electronic engineering, Transistor, Process (computing), 02 engineering and technology, Voltage regulator, computer.software_genre, 020202 computer hardware & architecture, law.invention, law, Embedded system, Next-generation network, 0202 electrical engineering, electronic engineering, information engineering, Operating system, Cache, business, Distributed File System, computer, Voltage
الوصف: Codenamed “Zen”, AMD's next-generation, high-performance ×86 core targets server, desktop, and mobile client applications. Utilizing Global Foundries' energy-efficient 14nm LPP FinFET process, the 44mm2 Zen core complex unit (CCX) has 1.4B transistors and contains a shared 8MB L3 cache and four cores (Fig. 3.2.7). The 7mm2 Zen core contains a dedicated 0.5MB L2 cache, 32KB L1 data cache, and 64KB L1 instruction cache. Each core has a digital low drop-out (LDO) voltage regulator and digital frequency synthesizer (DFS) to independently vary frequency and voltage across power states.
الوصول الحر: https://explore.openaire.eu/search/publication?articleId=doi_________::a1531050832f06532f78b6846da5e7c8Test
https://doi.org/10.1109/isscc.2017.7870256Test
رقم الانضمام: edsair.doi...........a1531050832f06532f78b6846da5e7c8
قاعدة البيانات: OpenAIRE