مؤتمر
A VHDL model and Implementation of a Coarse-Grain Reconfigurable Coprocessor for a RISC Core.
| العنوان: | A VHDL model and Implementation of a Coarse-Grain Reconfigurable Coprocessor for a RISC Core. |
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| المؤلفون: | Brunelli, C., Cinelli, F., Rossi, D., Nurmi, J. |
| المصدر: | 2006 Ph.D. Research in Microelectronics & Electronics; 2006, p229-232, 4p |
| قاعدة البيانات: | Complementary Index |
| ردمك: | 9781424401574 |
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| DOI: | 10.1109/RME.2006.1689938 |