مؤتمر
A fast buffered routing tree construction algorithm under accurate delay model
| العنوان: | A fast buffered routing tree construction algorithm under accurate delay model |
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| المؤلفون: | Yibo Wang, Yici Cai, Xianlong Hong |
| المصدر: | 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design |
| بيانات النشر: | IEEE Computer Soc |
| سنة النشر: | 2005 |
| نوع الوثيقة: | conference object |
| اللغة: | unknown |
| DOI: | 10.1109/icvd.2005.10 |
| الإتاحة: | https://doi.org/10.1109/icvd.2005.10Test http://xplorestaging.ieee.org/ielx5/9501/30140/01383259.pdf?arnumber=1383259Test |
| رقم الانضمام: | edsbas.290FE63 |
| قاعدة البيانات: | BASE |
| DOI: | 10.1109/icvd.2005.10 |
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