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1مؤتمر
المؤلفون: Jer-Yu Hsu, Yan-Zu Wu, Xuan-Yi Lin, Yeh-Ching Chung
المساهمون: 鍾葉青
مصطلحات موضوعية: VLIW processor, cluster processor architecture, register architecture, register allocation algorithm
الوقت: 2
العلاقة: Lecture Notes in Computer Science,Volume 4671,2007,頁 525-536; http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/66937Test
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2
المساهمون: 鍾葉青, Yeh-Ching Chung
مصطلحات موضوعية: 超長指令集處理器, 叢集式處理器架構, 暫存器架構, 暫存器配置演算法, 管線, VLIW architecture, clustered processor architecture, register file architecture, register allocation algorithm, wire
الوقت: 2
وصف الملف: 155 bytes; text/html
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